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November 2005 rev 1.7 Notebook LCD Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation. Provides up to 15dB EMI reduction. Generates a low EMI Spread Spectrum clock and a non-spread reference clock of the input frequency. Optimized for Frequency range from 20 to 40MHz. Internal loop filter minimizes external components and board space. Selectable spread options: Down and Center. Low Inherent Cycle-to-Cycle jitter. Eight spread % selections: 0.625% to -3.5%. 3.3V 0.3V Operating Voltage range. Low power CMOS design. Supports notebook VGA and other LCD timing controller applications. Power Down function for mobile application. Available in Commercial temperature range. Available in 8-pin SOIC and TSSOP Packages.
P1819
ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The P1819 modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called `Spread Spectrum Clock Generation'. The P1819 uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method.
Applications
The P1819 is targeted towards EMI management for memory and LVDS interfaces in mobile graphic chipsets and high-speed digital applications such as PC peripheral devices, consumer electronics, and embedded controller systems.
Product Description
The P1819 is a Versatile Spread Spectrum Frequency Modulator designed specifically for input clock frequencies from 20 to 40MHz. (Refer Input Frequency and Modulation Rate Table). The P1819 reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The P1819 allows significant system cost savings by reducing the number of circuit board layers
Block Diagram
D_C/NC PD# SRS
VDD
Modulation XIN/CLKIN Crystal Oscillator XOUT Frequenc y Feedback Divider
PLL
Phase Detector
Loop Filter
VCO
Output Divider
REF
ModOUT
VSS
Alliance Semiconductor 2575 Augustine Drive * Santa Clara, CA * Tel: 408.855.4900 * Fax: 408.855.4999 * www.alsc.com
Notice: The information in this document is subject to change without notice.
November 2005 rev 1.7
Pin Configuration
XIN/ CLKIN VSS SRS ModOUT 1 2 3 4 8 7 6 5 XOUT VDD PD# REF XIN / CLKIN VSS D_C / NC ModOUT 1 2 3 4 8 7 6 5 XOUT VDD PD# REF
P1819
P1819 A/B/C/D
P1819 E/F/G/H/Q
Pin Description Pin# 1819A/B/C/D
1 2 3
1819E/F/G/H/Q
1 2
Pin Name
XIN / CLKIN VSS SRS
Type
I P I
Description
Crystal Connection or external frequency input.This pin has dual functions. It can be connected to either an external crystal or an external reference clock Ground Connection. Connect to system ground. Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Selection Table). This pin has an internal pull-up resistor. Digital logic input used to select Down (LOW) or Center (HIGH) spread options (Refer Spread Deviation Selection Table). This pin has an internal pull-up resistor. Spread spectrum clock output. (Refer Input Frequency and Modulation Rate Table and Spread Deviation Selection Table) Non-modulated Reference clock output of the input frequency. Power down control pin. Pull LOW to enable PowerDown mode. This pin has an internal pull-up resistor. Power Supply for the entire chip. Crystal Connection. Input connection for an external crystal. If using an external reference, this pin must be left unconnected.
3
D_C / NC
I
4 5 6 7 8
Note: Pin 3 is NC in P1819Q
4 5 6 7 8
ModOUT REF PD# VDD XOUT
O O I P O
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Notice: The information in this document is subject to change without notice.
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November 2005 rev 1.7
Input Frequency and Modulation Rate Part Number
P1819
P1819
Input Frequency Range
20MHz to 40MHz
Output Frequency range
20MHz to 40MHz
Modulation rate
Input Frequency / 512
Spread Deviation Selection Part Number
P1819A
SRS
0 1 0 1 0 1 0 1 NA
D_C
NA
Spread Deviation
-2.50% (DOWN) -3.50% (DOWN) -1.25% (DOWN) -1.75% (DOWN) 1.25% (CENTER) 1.75% (CENTER) 0.625% (CENTER) 0.875% (CENTER) -1.25% (DOWN) 0.625% (CENTER) -2.5% (DOWN) 1.25% (CENTER) -1.75% (DOWN) 0.875% (CENTER) -3.5% (DOWN) 1.75% (CENTER) -2.5% (DOWN)
P1819B
NA
P1819C
NA
P1819D
NA 0 1 0 1 0 1 0 1 NA
P1819E
P1819F
NA
P1819G
NA
P1819H P1819Q
NA NA
Absolute Maximum Ratings Symbol
VDD, VIN TSTG TA Ts TJ TDV Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +7.0 -65 to +125 0 to 70 260 150 2
Unit
V C C C C KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.
Note Book LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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November 2005 rev 1.7
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+25C) unless otherwise stated)
P1819
Symbol
VIL VIH IIL IIH IXOL IXOH VOL VOH ICC IDD VDD tON ZOUT Input Low voltage Input High voltage
Parameter
Min
VSS - 0.3 2.0 -60.0 2.0 2.5 7.1 fIN - min 3.0 -
Typ
4.5 3.3 0.18 50
Max
0.8 VDD + 0.3 -20.0 1.0 12.0 12.0 0.4 26.9 fIN - max 3.6 -
Unit
V V A A mA mA V V mA mA V mS
Input Low current (inputs D_C, PD#, SRS) Input High current XOUT Output low current @ 0.4V, VDD = 3.3V XOUT Output high current @ 2.5V, VDD = 3.3V Output Low voltage VDD = 3.3V, IOL = 20mA Output High voltage VDD = 3.3V, IOH = 20mA Dynamic supply current normal mode 3.3V and 25pF probe loading Static supply current standby mode Operating Voltage Power up time (first locked clock cycle after power up) Clock Output impedance
AC Electrical Characteristics Symbol
fIN fOUT tLH* tHL* tJC tD
Parameter
Min
20 20 -200 45
Typ
0.66 0.65 50
Max
40 40 200 55
Unit
MHz MHz nS nS pS %
Input Frequency Output Frequency Output Rise time Measured from 0.8V to 2.0V Output Fall time Measured from 2.0V to 0.8V Jitter (cycle to cycle) Output Duty cycle
*tLH and tHL are measured into a capacitive load of 15pF
Note Book LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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November 2005 rev 1.7
Package Information 8-lead (150-mil) SOIC Package
P1819
E
H
D
A2
A
e B A 1
C L
D
Dimensions
Symbol Min
A1 A A2 B C D E e H L
Inches Max
0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007
Millimeters Min Max
0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0 1.27 8 0.25 1.75 1.50 0.51 0.25
0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0 0.050 8
Note: Controlling dimensions are millimeters SOIC - 0.074 grams unit weight
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November 2005 rev 1.7
8-lead Thin Shrunk Small Outline Package (4.40-MM Body)
P1819
H
E D A2 A e B A1 L C
Dimensions Symbol Min
A A1 A2 B c D E e H L 0.020 0 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8 0.50 0
Inches Max
0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30
Millimeters Min Max
1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8
Note: Controlling dimensions are millimeters TSSOP - 0.0325 grams unit weight
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November 2005 rev 1.7
Ordering Codes Part Number
P1819A-08ST P1819A-08SR P1819A-08TT P1819A-08TR P1819AF-08ST P1819AF-08SR P1819AF-08TT P1819AF-08TR P1819AG-08ST P1819AG-08SR P1819AG-08TT P1819AG-08TR P1819B-08ST P1819B-08SR P1819B-08TT P1819B-08TR P1819BF-08ST P1819BF-08SR P1819BF-08TT P1819BF-08TR P1819BG-08ST P1819BG-08SR P1819BG-08TT P1819BG-08TR
P1819
Marking
P1819A P1819A P1819A P1819A P1819AF P1819AF P1819AF P1819AF P1819AG P1819AG P1819AG P1819AG P1819B P1819B P1819B P1819B P1819BF P1819BF P1819BF P1819BF P1819BG P1819BG P1819BG P1819BG
Input Frequency (MHz)
20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40 20-40
Frequency Deviation (%)
-2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75 -1.25, -1.75
Package Type
8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel 8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel 8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel 8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel 8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel 8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel
Qty / reel
Pb Free
Temperature
0C to 70C
2500
0C to 70C 0C to 70C
2500 Pb Free 2500 Pb Free Pb Free 2500 Pb Free Green 2500 Green Green 2500 Green
0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C
2500
0C to 70C 0C to 70C
2500 Pb Free 2500 Pb Free Pb Free 2500 Pb Free Green 2500 Green Green 2500 Green
0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C 0C to 70C
Products are available for industrial temperature range operation. Please contact factory for more information.
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Device Ordering Information X
1 1.
P1819
1819
2
X
3
X
4 2. 3. 4. 5. 6.
-08
5
XX
6
Flow Prefix: a. I = Industrial temperature range (-40C to 85C). b. P = Commercial temperature range (0C to 70C).
Device Number. Deviation (%) and spread option identifier. Lead Free parts Device pin count. Package Identifier.
P1819A
F-08XX
SR - SOIC, T/R TT - TSSOP, TUBE TR - TSSOP, T/R ST - SOIC, TUBE Pin Count F =Lead Free and and RoHS compliant part G = Green Deviation (%) and Spread option Identifier DEVICE NUMBER Flow: P = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-40C to 85C)
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
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November 2005 rev 1.7
P1819
Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com
Copyright (c) Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P1819 Document Version: v1.7
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
(c) Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
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